1. Technical Field
The present disclosure relates to a semiconductor device.
2. Description of the Related Art
As one of scaling technologies to increase the density of semiconductor devices, a multi-gate transistor has been suggested, in which silicon bodies in a fin or nanowire shape are formed on a substrate, with gates then being formed on surfaces of the silicon bodies.
Such a multi-gate transistor allows easy scaling, as it uses a three-dimensional channel. Further, current control capability can be enhanced without increasing gate length of the multi-gate transistor. Furthermore, it is possible to effectively suppress short channel effect (SCE) which is a phenomenon that the electric potential of the channel region is influenced by the drain voltage.